In the information society of these days, electronic display devices are more important as information transmission media and various electronic display devices are widely applied for industrial apparatus or home appliances. Such electronic display devices are being continuously improved to have new appropriate functions for various demands of the information society.
In general, electronic display devices display and transmit various pieces of information to users who utilize such information. That is, the electronic display devices convert electric information signals outputted from electronic apparatus into light information signals recognized by users through their eyes.
In the electronic display devices dividing into an emissive display device and a non-emissive display device, the emissive display device displays light information signals through a light emission phenomena thereof and the non-emissive display device displays the light information signals through a reflection, a scattering or an interference thereof. The emissive display device includes a cathode ray tube (CRT), a plasma display panel (PDP), a light emitting diode (LED) and an electroluminescent display (ELD). The emissive display device is called as an active display device. Also, the non-emissive display device, called as a passive display device, includes a liquid crystal display (LCD), an electrochemical display (ECD) and an electrophoretic image display (EPID).
The CRT has been used for a television receiver or a monitor of a computer as the display device for a long time since it has a high quality and a low manufacturing cost. The CRT, however, has some disadvantages such as a heavy weight, a large volume and high power dissipation.
Recently, the demand for a new electronic display devices is greatly increased such as a flat panel display device having excellent characteristics that thin thickness, light weight, low driving voltage and low power consumption. Such flat panel display devices can be manufactured according to the rapidly improved semiconductor technology.
In the flat panel devices, a liquid crystal display (LCD) device has been widely utilized for various electronic devices because the LCD device has thin thickness, low power dissipation and high display quality approximately identical to those of the CRT. Also, the LCD device can be operated under a low driving voltage and can be easily manufactured so that the LCD device is widely used for various electronic apparatuses.
The LCD devices are generally divided into a transmission type LCD device, a reflection type LCD device and a reflection-transmission type LCD device. The transmission type LCD device displays information by using a light source such as a backlight and the reflection type LCD device displays information by using an external natural light. The reflection-transmission type LCD device operates in a transmission mode for displaying an image using a built-in light source of the LCD device in a room or in a dark place where an external light source does not exist, and operates in a reflection mode for displaying the image by reflecting an incident light in the outside.
At present, a thin film transistor-liquid crystal display device (TFT-LCD) is predominantly used. The thin film transistor-liquid crystal display device has a structure that two substrates respectively having electrodes are provided and a thin film transistor (TFT) for switching a voltage applied to the electrodes is generally formed in a pixel region of one of the substrates. The thin film transistor-liquid crystal display devices are divided into an amorphous typed TFT-LCD and a polycrystalline typed TFT-LCD.
FIGS. 1A and 1B are cross-sectional views showing a reflection type liquid crystal display device according to a conventional method. In FIGS. 1A and 1B, the reflection type liquid crystal display device is an amorphous silicon TFT-LCD having a bottom-gate structure. Referring to FIG. 1B, a reference symbol P shows a pad region; a reference symbol D indicates a display region; and a reference symbol B shows a boundary region located between the pad region and the display region.
Referring to FIGS. 1A and 1B, after sequentially depositing a chrome (Cr) layer 11 and an aluminum-neodymium (AlNd) layer 12 on a substrate 10 composed of an insulating material such as glass, quartz or sapphire, these layers are patterned by a photolithography process to form a gate wiring. The gate wiring includes a gate line 13 prolonged in a first direction, a gate electrode 12 of a thin film transistor branched from the gate line 13 and a gate terminal 15 connected to the end of the gate line 13.
A gate insulation layer 16 composed of silicon nitride is formed on the substrate 10 on which the gate wiring is formed, and then, an amorphous silicon layer and an n+ doped amorphous silicon layer are successively deposited on the gate insulation layer 16. Subsequently, the amorphous silicon layer and the n+ doped amorphous silicon layer are patterned via a photolithography process to form an active pattern 17 and an ohmic contact pattern 18. Thus, the active pattern 17 is composed of amorphous silicon and the ohmic contact pattern 18 is made of n+ doped amorphous silicon.
After depositing a second metal layer, e.g., chrome (Cr) layer, on the ohmic contact pattern 18 and the gate insulation layer 16, the second metal layer is patterned through a photolithography process to form a data wiring. The data wiring includes a data line 19 prolonged in a second direction perpendicular to the first direction, source/drain electrodes 20 and 21 branched from the data line 19 and a data terminal 22 connected to the end of the data line 19.
Then, a portion of the ohmic contact pattern 18 exposed between the source electrode 20 and the drain electrode 22 is dry-etched away to complete the thin film transistor.
After forming an inorganic passivation layer 24 comprised of silicon nitride on the data wiring and the gate insulation layer 16, a portion of the inorganic passivation layer 24 over the drain electrode 21 is removed. At the same time, there are formed a first pad contact hole 25 for exposing the gate terminal 15 and a second pad contact hole 26 for exposing the data terminal 22.
After forming an organic passivation layer 26 on the entire surface of the resultant structure, a portion the organic passivation layer 26 over the drain electrode 22 and the pad regions is removed by exposure and development processes to form a contact hole 29 exposing the drain electrode 22. At the same time, numerous grooves 30 for scattering a light are formed at the surface of the organic passivation layer 26.
After depositing a reflective layer composed of metal having high reflectivity such as aluminum-neodymium (AlNd) on the entire surface of the resultant structure, the reflective layer is patterned by a photolithography process to form a reflective electrode 32 connected to the drain electrode 21 through the contact hole 29. At the same time, there are formed a gate pad electrode 33 connected to the gate terminal 15 through the first pad contact hole 25 for applying a scanning voltage to the gate electrode 14 and a data pad electrode 34 connected to the data terminal 22 through the second pad contact hole 26 for applying a signal voltage to the source electrode 20.
According to the above conventional reflection type liquid crystal display device, the pad electrodes 33 and 34 are simultaneously formed when forming the reflective electrode 32 composed of aluminum alloy such as aluminum-neodymium (AlNd). Thus, during a subsequent chip on glass (COG) bonding process by which integrated circuits are directly mounted on the substrate of the LCD panel, COG (chip on glass) block defects may be caused due to aluminum corrosion. Therefore, there is suggested a method where a pad electrode is formed of an indium-tin-oxide (ITO) used as a transparent electrode.
FIG. 2 is a cross-sectional view of a reflection type liquid crystal display device manufactured by another conventional method. Here, a reference symbol P shows a pad region; a reference symbol D indicated a display region; and a reference symbol B shows a boundary region located between the pad region and the display region.
Referring to FIG. 2, after sequentially depositing a chrome (Cr) layer 51 and an aluminum-neodymium (AlNd) layer 52 on a substrate 50 composed of an insulating material such as glass, these layers are patterned by a photolithography process to form a gate wiring. The gate wiring includes a gate line 53 prolonged in a first direction, a gate electrode (not shown) branched from the gate line 53 and a gate terminal 54 connected to the end of the gate line 53.
A gate insulation layer 55 composed of silicon nitride is formed on the substrate 50 on which the gate wiring is formed. Then, an active pattern (not shown) composed of amorphous silicon and an ohmic contact pattern (not shown) composed of n+ doped amorphous silicon are successively formed on the gate insulation layer 55.
After depositing a second metal layer, e.g., a chrome (Cr) layer, on the ohmic contact pattern and the gate insulation layer 55, the second metal layer is patterned by a photolithography process to form a data wiring. The data wiring includes a data line 56 prolonged in a second direction perpendicular to the first direction, source/drain electrodes (not shown) branched from the data line 56 and a data terminal 58 connected to the end of the data line 56. Successively, a portion of the ohmic contact pattern exposed between the source electrode and the drain electrode is dry-etched away.
After forming an inorganic passivation layer 60 on the data wiring and the gate insulation layer 55, a portion of the inorganic passivation layer 60 over the drain electrode is removed by a photolithography process. At the same time, there are formed a first pad contact hole 61 exposing the gate terminal 54 and a second pad contact hole 62 exposing the data terminal 58. In general, ITO and Al cannot be in contact with each other due to a galvanic corrosion. Thus, during the formation of the pad contact holes 61 and 62, the entire exposed AlNd layer 52 of the gate terminal 54 is etched away using a wet etching process. By doing so, an ITO pad electrode being formed in a subsequent process is in contact with the Cr layer 51 of the gate terminal 54. However, when the AlNd layer 52 exposed through the first pad contact hole 61 is etched away, the side of the AlNd layer 52 is etched away due to the isotropic property of wet etching to thereby generate an undercut 64.
Next, an ITO layer is deposited on the pad contact holes 61 and 62 and the inorganic passivation layer 60 and then, patterned by a photolithography process to thereby form a gate pad electrode 65 and a data pad electrode 66. The gate pad electrode 65 is connected to the gate terminal 54 through the first pad contact hole 61 and the data pad electrode 66 is connected to the data terminal 58 through the second pad contact hole 62. At this time, step coverage of the date pad electrode 65 becomes poor on a stepped portion in the first pad contact hole 61, i.e., the undercut region 64.
After forming an organic passivation layer 68 on the pad electrodes 65 and 66 and the inorganic passivation layer 60, the organic passivation layer 68 is patterned by an exposure process and a development process to thereby form a contact hole (not shown) for exposing the drain electrode. At the same time, numerous grooves 69 are formed in the surface of the organic passivation layer over the display region.
After sequentially depositing a barrier metal layer 70 composed of molybdenum-tungsten (MoW) and a reflective layer composed of aluminum-neodymium (AlNd) on the contact hole and the organic passivation layer 68, the reflective layer and the barrier metal layer 70 are patterned by a photolithography process to thereby form a reflective electrode 72 connected to the drain electrode through the contact hole.
According to the above conventional method, in order to prevent the galvanic corrosion caused between ITO and Al, the entire AlNd layer 52 of the gate terminal 54 is etched away using a wet etching process when the pad contact holes 61 and 62 are formed. Thus, the undercut 64 is generated in the AlNd layer 52.
Further, two photolithography processes for forming the organic passivation layer 68 and the reflective electrode 72 are carried out after the pad electrodes 65 and 66 are formed. Moreover, in order to improve the pixel contact characteristics, an etching process using an aluminum etchant is added before forming the reflective electrode 72. Accordingly, during performing the above processes, chemicals such as a develop solution or an etchant penetrate through the stepped portion (portion “A” in FIG. 2) in the first pad contact hole 61 to thereby corrode the AlNd layer 52. In addition, such chemicals serve as an electrolyte to cause a battery effect between Al and ITO, thereby generating a lifting of the gate pad electrode 61.